1. Field of the Invention
This invention generally relates to a memory controller, and more particularly, to a memory controller having timing compensation function.
2. Description of the Related Art
For a conventional memory controller coupled to a double data rate (DDR) memory, the memory controller outputs a clock signal CLK to the DDR memory and reads out data contained in a data signal DQ from the DDR memory or writes the data into the DDR memory according to a bi-directional data strobe signal DQS. In addition, the memory controller outputs a control signal CMD to the DDR memory for determining a reading operation or a writing operation to be carried out in the DDR memory.